Electromigration-induced void evolution in upper and lower layer dual-inlaid Copper interconnect structures

D.J. Pete , S.G. Mhaisalkar , J.B. Helonde , A.V. Vairagar

Abstract

Electromigration-induced void evolutions in typical upper and lower layer dual-inlaid Copper (Cu) interconnect structures were simulated by applying a phenomenological model resorting to Monte Carlo based simulations, which considers redistribution of heterogeneously nucleated voids and/or pre-existing vacancy clusters at the Copper/dielectric cap interface during electromigration. The results indicate that this model can qualitatively explain the electromigration-induced void evolutions observations in many studies reported by several researchers heretofore. These findings warrant need to re-investigate technologically important electromigration mechanisms by developing rigorous models based on similar concepts.

Key Words

electromigration in Copper; surface void migration; dual-inlaid Copper interconnect

Address

D.J. Pete: Datta Meghe College of Engineering, Navi Mumbai, India; S.G. Mhaisalkar: School of Materials Engineering, Nanyang Technological University, Singapore; J.B. Helonde: ITM College of Engineering, Nagpur, India; A.V. Vairagar: OMScientific Private Limited, Pune, India

PDF Viewer

Preview uses the same access rules as Full Text PDF (subscription, purchase, or open access).

← Back to Volume 1, No. 2